Slew-rate control circuitry with output buffer and

专利名称：Slew-rate control circuitry with output

buffer and feedback

发明人：Che-Hao Chuang,Tang-Kuei Tseng,Ryan

Hsin-Chin Jiang

申请号：US12015395申请日：20080116公开号：US07652511B2公开日：20100126

专利附图：

摘要：The present invention proposed a slew-rate control circuitry without the use ofexternal components such as amplifiers. Therefore slew-rate control circuitry of the

present invention not only provides an IC with build-in slew-rate control, but also reducesnumber of transistors used externally which will increase gate-oxide reliability of the IC.The slew-rate control circuitry of the present invention is primarily comprised by anoutput buffer and feedback circuitry, the output buffer mainly consisted four transistorsand depends on output of the IC, these four transistors will interact with each other tocontrol the slew-rate of IC output. Additional feedback circuitry and gate-trackingcircuitry are also disclosed to enhance the performance of the slew-rate control circuitry.

申请人：Che-Hao Chuang,Tang-Kuei Tseng,Ryan Hsin-Chin Jiang

地址：Hsinchu TW,Hsinchu TW,Taipei TW

国籍：TW,TW,TW

代理机构：Sinorica, LLC

代理人：Ming Chow

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