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STACKED DIE PACKAGE

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专利内容由知识产权出版社提供

专利名称:STACKED DIE PACKAGE

发明人:Nitin Juneja,Wendemagegnehu Beyene,David

A. Secker,Ely K. Tsern

申请号:US14513871申请日:20141014

公开号:US20150108656A1公开日:20150423

专利附图:

摘要:Disclosed is a package-on-package (PoP) assembly comprises a two-tieredwindowed ball grid array (BGA) and a system on a chip (SoC) package. Window openings inthe two tiers of the BGA are of different sizes to allow for wirebond landing pads on the

first tier. A DRAM die is mounted to the BGA flipped over (i.e., wirebond pads facing theBGA package.) The DRAM die is wirebonded through the window in the BGA. For multi-channel systems and higher memory capacity, the DRAM die will have low-cost through-silicon vias (TSVs) that connect to stacked DRAM die(s). The stacked DRAM dies may beoffset or rotated to align active TSVs with passive TSVs thereby enabling uniqueconnections to certain DRAM dies in the stack.

申请人:Rambus Inc.

地址:Sunnyvale CA US

国籍:US

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